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W948D6FB / W948D2FB
256Mb Mobile LPDDR
SIGNAL NAME
TYPE
FUNCTION
DESCRIPTION
CKE HIGH activates, and CKE LOW deactivates internal clock
signals, and device input buffers and output drivers. Taking CKE
LOW provides PRECHARGE, POWER DOWN and SELF
REFRESH operation (all banks idle), or ACTIVE POWER DOWN
CKE
Input
Clock Enable
(row ACTIVE in any bank). CKE is synchronous for all functions
except for SELF REFRESH EXIT, which is achieved
asynchronously. Input buffers, excluding CK, CK and CKE, are
disabled during power down and self refresh mode which are
contrived for low standby power consumption.
LDQS, UDQS
(x16);
DQS0~DQS3
(x32)
VDD
VSS
VDDQ
VSSQ
NC
I/O
Supply
Supply
Supply
Supply
-
Data Strobe
Power
Ground
Power for I/O
Buffer
Ground for I/O
Buffer
No Connect
Output with read data, input with write data. Edge-aligned with
read data, centered with write data. Used to capture write data.
x16: LDQS: DQ0~DQ7; UDQS: DQ8~DQ15.
x32: DQS0: DQ0~DQ7; DQS1: DQ8~DQ15;
DQS2: DQ16~DQ23; DQS3: DQ24~DQ31.
Power supply for input buffers and internal circuit.
Ground for input buffers and internal circuit.
Power supply separated from VDD, used for output drivers to
improve noise.
Ground for output drivers.
Non connection pin.
4.2 Addressing Table
Number of banks
Bank address pins
Auto precharge pin
ITEM
Row addresses
256 Mb
4
BA0,BA1
A10/AP
A0-A12
X16
x32
Column addresses
tREFI(μs)
Row addresses
Column addresses
tREFI(μs)
-7-
A0-A8
7.8
A0-A11
A0-A8
15.6
Publication Release Date : Oct, 15, 2012
Revision : A01-004
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